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Please use this identifier to cite or link to this item: http://10.10.120.238:8080/xmlui/handle/123456789/186
Title: Noninverting Schmitt Trigger Circuit with Improved Hysteresis Behavior
Authors: Kannaujiya A.
Jangral U.
Shah A.P.
Keywords: Buffer
CMOS
Hysteresis
Noise immunity
Schmitt trigger
Issue Date: 2023
Publisher: Institute of Electrical and Electronics Engineers Inc.
Abstract: This work brief a noninverting Schmitt trigger circuit with improved noise immunity. The work integrates the investigation of the proposed dual threshold controlled Schmitt trigger (DTC-ST) in terms of low switching power consumption, less propagation delay, and reduced leakage power. Thus, the end result of the proposed DTC-ST yields well-defined hysteresis behavior and better noise immunity due to the use of one PMOS and one NMOS as a two-layered feedback approach which can be employed in the low-noise receiver and waveform reshaping circuit applications. The DTC-ST has 2.89 ×, 1.64×, and 4.9× less delay, dynamic power, and leakage power respectively in comparison to the conventional Schmitt trigger. Further, 5000 Monte Carlo simulations reveal that low variation in VLH and VHL of the proposed circuit makes it a robust design. © 2023 IEEE.
URI: https://dx.doi.org/10.1109/PRIME58259.2023.10161973
http://localhost:8080/xmlui/handle/123456789/186
ISBN: 979-8350303209
Appears in Collections:Conference Paper

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