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Please use this identifier to cite or link to this item: http://10.10.120.238:8080/xmlui/handle/123456789/186
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dc.contributor.authorKannaujiya A.en_US
dc.contributor.authorJangral U.en_US
dc.contributor.authorShah A.P.en_US
dc.date.accessioned2023-11-30T08:12:23Z-
dc.date.available2023-11-30T08:12:23Z-
dc.date.issued2023-
dc.identifier.isbn979-8350303209-
dc.identifier.otherEID(2-s2.0-85165120337)-
dc.identifier.urihttps://dx.doi.org/10.1109/PRIME58259.2023.10161973-
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/186-
dc.description.abstractThis work brief a noninverting Schmitt trigger circuit with improved noise immunity. The work integrates the investigation of the proposed dual threshold controlled Schmitt trigger (DTC-ST) in terms of low switching power consumption, less propagation delay, and reduced leakage power. Thus, the end result of the proposed DTC-ST yields well-defined hysteresis behavior and better noise immunity due to the use of one PMOS and one NMOS as a two-layered feedback approach which can be employed in the low-noise receiver and waveform reshaping circuit applications. The DTC-ST has 2.89 ×, 1.64×, and 4.9× less delay, dynamic power, and leakage power respectively in comparison to the conventional Schmitt trigger. Further, 5000 Monte Carlo simulations reveal that low variation in VLH and VHL of the proposed circuit makes it a robust design. © 2023 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourcePRIME 2023 - 18th International Conference on Ph.D Research in Microelectronics and Electronics, Proceedingsen_US
dc.subjectBufferen_US
dc.subjectCMOSen_US
dc.subjectHysteresisen_US
dc.subjectNoise immunityen_US
dc.subjectSchmitt triggeren_US
dc.titleNoninverting Schmitt Trigger Circuit with Improved Hysteresis Behavioren_US
dc.typeConference Paperen_US
Appears in Collections:Conference Paper

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