Skip navigation

Please use this identifier to cite or link to this item: http://10.10.120.238:8080/xmlui/handle/123456789/747
Title: Design of fault tolerant bifunctional parity generator and scalable code converters based on QCA technology
Authors: Safoev N.
Ahmed S.
Tashev K.
Naz S.F.
Keywords: Code converter
Fault tolerant design
Nanocomputing
Parity generator
QCA
Quantum-dot Cellular Automata
Issue Date: 2022
Publisher: Springer Science and Business Media B.V.
Abstract: In this paper, we focus on novel designs for digital code converter and parity generator circuits in quantum-dot cellular automata (QCA) technology, which is transistor less computation approach and encodes binary information through the configuration of charges among quantum dots. In existing works, code converters and parity generators have been designed using majority gate and inverter-based XOR gates that is the basic structure of these circuits. However, our proposed designs use explicit cell interaction-based XOR gate to designing a compact form of QCA circuits. As a result, novel designs for generating parity bit, Binary to Gray, Gray to Binary code converter are presented with low complexity. Moreover, we will first demonstrate the bifunctional parity generator in QCA. The correct operation of the structures has been verified using the QCADesigner tool. A structural comparison was made with previous works and found that the proposed designs have significant improvements over existing ones. © 2021, Bharati Vidyapeeth's Institute of Computer Applications and Management.
URI: https://dx.doi.org/10.1007/s41870-021-00730-x
http://localhost:8080/xmlui/handle/123456789/747
ISSN: 2511-2104
Appears in Collections:Journal Article

Files in This Item:
There are no files associated with this item.
Show full item record


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.